1/9 n very low power consumption : 10a/op n output voltage can swing to ground n excellent phase margin on capacitive loads n stable and low offset voltage n three input offset voltage selections description these devices are low cost, low power dual oper- ational amplifiers designed to operate with single or dual supplies. these operational amplifiers use the st silicon gate cmos process allowing an ex- cellent consumption-speed ratio. these series are ideally suited for low consumption applications. three power consumptions are available allowing to have always the best consumption-speed ratio: q i cc = 10a/amp.: ts27l2 (very low power) q i cc = 150a/amp.: ts27m2 (low power) q i cc = 1ma/amp.: ts272 (standard) these cmos amplifiers offer very high input im- pedance and extremely low input currents. the major advantage versus jfet devices is the very low input currents drift with temperature (see fig- ure 2). order code n = dual in line package (dip) d = small outline package (so) - also available in tape & reel (dt) p = thin shrink small outline package (tssop) - only available in tape & reel (pt) pin connections (top view) part number temperature range package ndp ts27l2c/ac/bc 0c, +70c ts27l2i/ai/bi -40c, +125c ts27l2m/am/bm -55c, +125c example : ts27l2acn n dip8 (plastic package ) d so8 (plastic micropackage ) p tssop8 (thin shrink small outline package) 1 2 3 45 6 7 8 cc + - - + - + cc 1 - output 1 2 - inverting input 1 3 - non-inverting input 1 4 - v 5 - non-inverting input 2 6 - inverting input 2 7 - output 2 8 - v ts27l2c,i,m precision very low power cmos dual operational amplifiers november 2001
ts27l2c,i,m 2/9 block diagram absolute maximum ratings operating conditions e e input differential second stage output stage output cc v cc v current source x i symbol parameter ts27l2c/ac/bc ts27l2i/ai/bi ts27l2m/am/bm unit v cc + supply voltage 1) 18 v v id differential input voltage 2) 18 v v i input voltage 3) -0.3 to 18 v i o output current for v cc + 3 15v 30 ma i in input current 5 ma t oper operating free-air temperature range 0 to +70 -40 to +125 -55 to +125 c t stg storage temperature range -65 to +150 c 1. all values, except differential voltage are with respect to network ground terminal. 2. differential voltages are the non-inverting input terminal with respect to the inverting input terminal. 3. the magnitude of the input and the output voltages must never exceed the magnitude of the positive supply voltage. symbol parameter value unit v cc + supply voltage 3 to 16 v v icm common mode input voltage range 0 to v cc + - 1.5 v
ts27l2c,i,m 3/9 schematic diagram (for 1/2 ts27l2) t t 25 2 t 17 18 r t 20 t 21 t t 23 22 input output t 24 t 19 v cc v cc t 26 t 27 t 28 t 29 in pu t t 3 t 4 t 5 t 2 t 1 r1 c1 t 7 t 6 t 8 t 9 t 13 t 14 t 11 t 12 t 10 t 16 t 15
ts27l2c,i,m 4/9 electrical characteristics v cc + = +10v, v cc - = 0v, t amb = +25c (unless otherwise specified) symbol parameter ts27l2c/ac/bc ts27l2i/ai/bi ts27l2m/am/bm unit min. typ. max. min. typ. max. v io input offset voltage v o = 1.4v, v ic = 0v ts27l2c/i/m ts27l2ac/ai/am ts27l2b/c/i/m t min t amb t max ts27l2c/i/m ts27l2ac/ai/am ts27l2b/c/i/m 1.1 0.9 0.25 10 5 2 12 6.5 3 1.1 0.9 0.25 10 5 2 12 6.5 3.5 mv dv io input offset voltage drift 2 2 v/c i io input offset current note 1) v ic = 5v, v o = 5v t min t amb t max 1. maximum values including unavoidable inaccuracies of the industrial test. 1 100 1 200 pa i ib input bias current - see note 1 v ic = 5v, v o = 5v t min t amb t max 1 150 1 300 pa v oh high level output voltage v id = 100mv, r l = 1m w t min t amb t max 8.8 8.7 98.8 8.6 9v v ol low level output voltage v id = -100mv 50 50 mv a vd large signal voltage gain v ic = 5v, r l = 1m w, v o = 1v to 6v t min t amb t max 60 45 100 60 40 100 v/mv gbp gain bandwidth product a v = 40db, r l = 1m w, c l = 100pf, f in = 100khz 0.1 0.1 mhz cmr common mode rejection ratio v ic = 1v to 7.4v, v o = 1.4v 65 80 65 80 db svr supply voltage rejection ratio v cc + = 5v to 10v, v o = 1.4v 60 80 60 80 db i cc supply current (per amplifier) a v = 1, no load, v o = 5v t min t amb t max 10 15 17 10 15 18 a i o output short circuit current v o = 0v, v id = 100mv 60 60 ma i sink output sink current v o = v cc , v id = -100mv 45 45 ma sr slew rate at unity gain r l = 1m w , c l = 100pf, v i = 3 to 7v 0.04 0.04 v/ m s f m phase margin at unity gain a v = 40db, r l = 1m w , c l = 100pf 45 45 degrees k ov overshoot factor 30 30 % e n equivalent input noise voltage f = 1khz, r s = 100 w 68 68 v o1 /v o2 channel separation 120 120 db nv hz ----------- -
ts27l2c,i,m 5/9 typical characteristics figure 1 : supply current (each amplifier) versus supply voltage figure 2 : input bias current versus free air temperature figure 3a : high level output voltage versus high level output current figure 3b : high level output voltage versus high level output current figure 4a : low level output voltage versus low level output current figure 4b : low level output voltage versus low level output current cc supply voltage, v (v) cc amb v occ 0481216 20 m supply current, i ( a) t=25c a=1 v=v /2 15 10 5 25 50 75 100 125 amb input bias current, i (pa) ib temperature, t ( c) v = 10v v=5v cc i 100 10 1 5 4 3 2 1 0 -10 -8 -6 -4 -2 0 oh output current, i (ma) output voltage, v (v) oh amb id t = 25 c v = 100mv v=5v v=3v cc cc 20 16 12 8 4 0 -50 -40 -30 -20 -10 0 amb id t = 25 c v = 100mv v = 16v cc cc v = 10v output current, i (ma) oh oh output voltage, v (v) 1.0 0.8 0.6 0.4 0.2 amb ic id t=25c v = 0.5v v = -100mv v=3v v=5v cc cc ol output voltage, v (v) 0123 output current, i (ma) ol 0 4 8121620 output voltage, v (v) ol amb id i t = 25c v=0.5v v = -100mv cc v=10v cc v=16v output current, i (ma) ol 3 2 1
ts27l2c,i,m 6/9 figure 5 : open loop frequency response and phase shift figure 6 : gain bandwidth product versus supply voltage figure 7 : phase margin versus supply voltage figure 8 : phase margin versus capacitive load figure 9 : slew rate versus supply voltage figure 10 : input voltage noise versus frequency 50 40 30 20 10 0 -10 6 10 10 23 10 4 10 5 10 7 10 gain (db) phase (degrees) 0 45 90 135 180 frequency, f (hz) t = 25c v=10v r=1m w c = 100pf a=100 amb cc l l vcl phase gain phase margin gain bandwidth product + 0481216 gain bandw. prod., gbp (mhz) amb l l v t = 25c r=1m w c = 100pf a=1 supply voltage, v (v) cc 120 100 80 60 40 60 04 8 1216 supply voltage, v (v) cc amb l l t=25c r=1m c = 100pf a=1 v phase margin, m (degrees) f 50 40 30 w 80 70 60 50 40 l capacitance, c (pf) phase margin, m (degrees) f 20 0 80 100 60 40 t=25c r=1m w a=1 v=10v amb l v cc 0.05 0.04 0.03 0.02 4 6 8 10 12 14 16 supply voltage, v (v) cc slew rates, sr (v/ m s) amb l l t=25c r=1m w c = 100pf sr sr 300 200 100 0 equivalent input noise voltage (nv/vhz) 110 100 1000 frequency (hz) = 10v =25c t amb v cc =100 w r s
ts27l2c,i,m 7/9 package mechanical data 8 pins - plastic dip dim. millimeters inches min. typ. max. min. typ. max. a 3.32 0.131 a1 0.51 0.020 b 1.15 1.65 0.045 0.065 b 0.356 0.55 0.014 0.022 b1 0.204 0.304 0.008 0.012 d 10.92 0.430 e 7.95 9.75 0.313 0.384 e 2.54 0.100 e3 7.62 0.300 e4 7.62 0.300 f 6.6 0260 i 5.08 0.200 l 3.18 3.81 0.125 0.150 z 1.52 0.060
ts27l2c,i,m 8/9 package mechanical data 8 pins - plastic micropackage (so) dim. millimeters inches min. typ. max. min. typ. max. a 1.75 0.069 a1 0.1 0.25 0.004 0.010 a2 1.65 0.065 a3 0.65 0.85 0.026 0.033 b 0.35 0.48 0.014 0.019 b1 0.19 0.25 0.007 0.010 c 0.25 0.5 0.010 0.020 c1 45 (typ.) d 4.8 5.0 0.189 0.197 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 f 3.8 4.0 0.150 0.157 l 0.4 1.27 0.016 0.050 m 0.6 0.024 s 8 (max.) b e3 a a2 s l c e c1 a3 b1 a1 d m 8 5 1 4 f
ts27l2c,i,m 9/9 package mechanical data 8 pins - thin shrink small outline package (tssop) dim. millimeters inches min. typ. max. min. typ. max. a 1.20 0.05 a1 0.05 0.15 0.01 0.006 a2 0.80 1.00 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.15 c 0.09 0.20 0.003 0.012 d 2.90 3.00 3.10 0.114 0.118 0.122 e 6.40 0.252 e1 4.30 4.40 4.50 0.169 0.173 0.177 e 0.65 0.025 k 0 8 0 8 l 0.50 0.60 0.75 0.09 0.0236 0.030 l 0.45 0.600 0.75 0.018 0.024 0.030 l1 1.000 0.039 c l 14 8 5 l1 c 0.25mm .010 inch gage plane e1 k l l1 e seating plane a a2 d a1 b 5 8 4 1 pin 1 identification e information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2001 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states ? http://www.st.com
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